(1) Field of the Invention
This invention relates to a MIS (metal insulator semiconductor) type diamond field-effect transistor which has a structure comprising a thin film of diamond on a non-diamond substrate and is suitable for mass-production.
(2) Description of the Prior Art
Diamond has a large bandgap, as compared with Si (silicon), Sic (silicon carbide) and the like, has a high thermal conductivity and is resistive to heat, radiation, and chemicals. Diamond is therefore expected to be used as an excellent semiconductor material for electronic devices capable of operating normally at high temperatures of about 400.degree. to 500.degree. C. or electronic devices capable of operating under severe conditions. Furthermore, diamond is a good insulator without impurity doping.
Diamond films, having the above-mentioned properties, can be obtained by chemical vapor deposition (CVD). A MIS type diamond field-effect transistor (hereinafter referred to simply as "MIS type diamond FET") using a thin film of diamond synthesized by CVD has been proposed as shown, in section, in FIG. 4 (Japanese Patent Application Laid-Open (KOKAI) No. 64-68966 (1989)).
In the figure, numeral 51 denotes a substrate comprised of a single crystal of diamond, on a major surface of which n-type diamond semiconductor layers 52 and a p-type diamond semiconductor layer 53 are formed. Denoted by 54 is a diamond insulator layer, which is provided on the p-type diamond semiconductor layer 53 in such a condition that portions thereof are located on the n-type diamond semiconductor layers 52. The reference number 55a denotes a source electrode, 55b a gate electrode, and 55c a drain electrode.
The MIS type diamond FET having the above structure is manufactured by a method in which the substrate 51 comprised of a single crystal of diamond is first prepared, and then the n-type diamond semiconductor layer 52, doped with P (phosphorus), is deposited on one major surface of the diamond single crystal substrate 51 by CVD (microwave plasma CVD method).
Thereafter, as a portion at which to form the p-type diamond semiconductor layer 53, a portion of the n-type diamond semiconductor layer 52 is dry-etched by plasma or ion-beam etching, after applying a mask formed of a predetermined metal film such as Cr (chromium) to the other portions of the n-type diamond semiconductor layer 52. Next, the p-type diamond semiconductor layer 53, doped with B (boron), is deposited by CVD, followed by a removal of those portions of the p-type diamond semiconductor layer 53 which are located on the n-type diamond semiconductor layers 52, together with the mask by a lift-off method. Subsequently, the diamond insulator layer 54, which is not doped, is formed by CVD on both the diamond semiconductor layers 52 and 53 provided as above. Then, those portions of the diamond insulator layer 54 which are located on the n-type diamond semiconductor layers 52 are dry-etched in part. Finally, the source electrode 55a, the gate electrode 55b and the drain electrode 55c are provided.
The conventional MIS type diamond FET having the above structure can operate normally in a higher-temperature atmosphere as compared with field-effect transistors using Si or the like as a material thereof. The conventional MIS type diamond FET using the substrate comprised of a single crystal of diamond, however, has the problem of low productivity in the manufacture thereof, because it is not easy to manufacture (grow) a diamond single crystal substrate of large area by a high-pressure synthesis method or the like and, accordingly, it is difficult to fabricate simultaneously a large number of elemental devices on the diamond single crystal substrate.